The semiconductor industry is rapidly developing chips with smaller and smaller transistor dimensions to gain more functionality per unit area. As the dimensions of devices continue to shrink, so does the gap/space between the devices, increasing the difficulty to physically isolate the devices from one another. Filling in the high aspect ratio trenches/spaces/gaps between devices which are often irregularly shaped with high-quality dielectric materials is becoming an increasing challenge to implementation with existing methods including gapfill, hardmasks and spacer applications.
Integrated circuits are made possible by processes which produce intricately patterned material layers on substrate surfaces. Producing patterned materials on a substrate requires controlled methods for removal of exposed material. Often it is useful to have an etch process which etches one material faster than another material. Such an etch process is said to be selective of the first material. As a result of the diversity of materials, circuits and processes, etch processes have been developed that selectively remove one or more of a broad range of materials.
Metal nitrides (e.g., TaN and TiN) are widely used in metal gate as high-k and n-metal capping, p-metal, or etch stop layers. In the advanced integration scheme (10 nm and beyond), it is common that both TaN and TiN are exposed on the surface before the sequential metal deposition. Those metal nitrides are oxidized after air exposure, which could impact P or N metal work function. Furthermore, in order to achieve tunable work function, it can be useful to control the thickness of the substrate TaN or TiN before metal deposition.
Therefore, there is a need in the art for new methods for selectively etching metal nitride films.